Senior Principal Digital Engineer (FPGA and ASIC Design)
Company: Northrop Grumman
Location: Baltimore
Posted on: October 4, 2024
Job Description:
Requisition ID: R
- Category: Engineering
- Location: Baltimore, Maryland, United States of America
- Clearance Type: Secret
- Telecommute: No- Teleworking not available for this
position
- Shift: 1st Shift (United States of America)
- Travel Required: Yes, 10% of the Time
- Relocation Assistance: Relocation assistance may be
available
- Positions Available: 1At Northrop Grumman, our employees have
incredible opportunities to work on revolutionary systems that
impact people's lives around the world today, and for generations
to come. Our pioneering and inventive spirit has enabled us to be
at the forefront of many technological advancements in our nation's
history - from the first flight across the Atlantic Ocean, to
stealth bombers, to landing on the moon. We look for people who
have bold new ideas, courage and a pioneering spirit to join forces
to invent the future, and have fun along the way. Our culture
thrives on intellectual curiosity, cognitive diversity and bringing
your whole self to work - and we have an insatiable drive to do
what others think is impossible. Our employees are not only part of
history, they're making history. At the heart of Defining Possible
is our commitment to missions. In rapidly changing global security
environments, Northrop Grumman brings informed insights and
software-secure technology to enable strategic planning. We're
looking for innovators who can help us keep building on our wide
portfolio of secure, affordable, integrated, and multi-domain
systems and technologies that fuel those missions. By joining in
our shared mission, we'll support yours of expanding your personal
network and developing skills, whether you are new to the field, or
an industry thought leader. At Northrop Grumman, you'll have the
resources, support, and team to do some of the best work of your
career. We are looking for you to join our team as a Principal
Digital Engineer/Senior Principal Digital Engineer (FPGA and ASIC
Design) based out of Linthicum, MD. What You'll get to Do: As an
integral part of our cross-discipline engineering team in Mission
Systems that encompasses Digital Engineering to support FPGA and
ASIC product development.
- Work closely with design engineers and will utilize your
knowledge of modern design methods, tools and techniques.
- Development of testbench, tests, verification IP (VIP),
verification models, coverage models, extensive simulation and
debug, code coverage and functional coverage, generation and
analysis of reports and metrics, documentation etc.
- Ability to operate in a team environment and collaborate across
the different teams as required to accomplish the goals.This
position is contingent upon contract award, successful transfer of
an active DoD Secret Clearance and the ability to obtain Special
Program Access (SAP) prior to start. Basic Qualifications:
- Bachelor's degree with 8 years of experience, a Master's degree
with 6 years of experience or a PhD with 3 years of experience in
Electrical Engineering, Computer Engineering, Computer Science, or
related technical fields; an additional 4 years of experience may
be considered in lieu of a degree
- U.S Citizenship is required
- An active DoD Secret Security Clearance is required with the
ability to obtain Special Program Access (SAP) prior to start.
- Experience with industry standard FPGA design implementation
tools for IP integration, PnR, CDC such as Xilinx Vivado, Intel
Quartus, and QuestaSim
- Working knowledge of full product life cycle (requirements,
design, implementation and test) of FPGA Design and/or ASIC
Design
- Knowledge of System Verilog, Verilog and/or VHDLPreferred
Qualifications:
- Advanced Degrees in Electrical Engineering, Computer
Engineering, Computer Science, or related technical fields
- Active DoD Top Secret Clearance or higher
- Experience with industry standard ASIC front-end design tools
for synthesis, LEC, CDC
- Experience with STA constraints generation and timing
closure
- Experience with MATLAB, Mentor Graphics design tools, Synopsys
or similar tool
- Familiarity with Xilinx and Intel FPGA technologyAs a full-time
employee of Northrop Grumman Mission Systems, you are eligible for
our robust benefits package including:
- Medical, Dental & Vision coverage
- 401k
- Educational Assistance
- Life Insurance
- Employee Assistance Programs & Work/Life Solutions
- Paid Time Off
- Health & Wellness Resources
- Employee DiscountsLink to Benefits: This positions standard
work schedule is a 9/80. The 9/80 schedule allows employees who
work a nine-hour day Monday through Thursday to take every other
Friday off. Salary Range: $139,700 - $209,500The above salary range
represents a general guideline; however, Northrop Grumman considers
a number of factors when determining base salary offers such as the
scope and responsibilities of the position and the candidate's
experience, education, skills and current market
conditions.Employees may be eligible for a discretionary bonus in
addition to base pay. Annual bonuses are designed to reward
individual contributions as well as allow employees to share in
company results. Employees in Vice President or Director positions
may be eligible for Long Term Incentives. In addition, Northrop
Grumman provides a variety of benefits including health insurance
coverage, life and disability insurance, savings plan, Company paid
holidays and paid time off (PTO) for vacation and/or personal
business.The application period for the job is estimated to be 20
days from the job posting date. However, this timeline may be
shortened or extended depending on business needs and the
availability of qualified candidates.Northrop Grumman is committed
to hiring and retaining a diverse workforce. We are proud to be an
Equal Opportunity/Affirmative Action Employer, making decisions
without regard to race, color, religion, creed, sex, sexual
orientation, gender identity, marital status, national origin, age,
veteran status, disability, or any other protected class. For our
complete EEO/AA and Pay Transparency statement, please visit. U.S.
Citizenship is required for all positions with a government
clearance and certain other restricted positions.
Keywords: Northrop Grumman, Reading , Senior Principal Digital Engineer (FPGA and ASIC Design), Engineering , Baltimore, Pennsylvania
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